1. Field of the Invention
The present invention relates to an error-correction coding method, an error-correction decoding method, an error-correction coding apparatus, and an error-correction decoding apparatus applied to a digital transmission system and the like.
2. Description of the Related Art
In a conventional error-correction coding method for optical communications, suppression of an error floor(a phenomenon in which a degree of improvement in a bit error rate after correction falls abruptly) is required. In “Y. Miyata, W. Masumoto, H. Yoshida, and T. Mizuochi, “Efficient FEC for optical communications using concatenated codes to combat error-floor,” in Proc. OFC/NFOEC 2008, OTuE4, San Diego, Calif., February 2008”, a low-density parity-check (LDPC) code (that provides soft-decision decoding with a high error correction capability) is set for an inner code and a Reed-Solomon (RS) code (that provides hard-decision decoding with a relatively low error correction capability) is set for an outer code. The soft-decision decoding with a high error correction capability is performed using the LDPC code and an error floor remaining after the LDPC code is used is eliminated using the RS code. The error correction capability and circuit size are in a trade-off relation, and thus the circuit size associated with the LDPC code is increased in this case.
Because the conventional error-correction coding method and an apparatus therefor are configured as described above, the circuit size for the inner code is adversely increased.